SLVSAW1A June   2011  – January 2017 TPS65053-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Function
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Mode Selection
      2. 7.3.2 Enable
      3. 7.3.3 Reset
      4. 7.3.4 Short-Circuit Protection
      5. 7.3.5 Thermal Shutdown
        1. 7.3.5.1 Low Dropout Voltage Regulators
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Save Mode
        1. 7.4.1.1 Dynamic Voltage Positioning
        2. 7.4.1.2 Soft Start
        3. 7.4.1.3 100% Duty-Cycle Low Dropout Operation
        4. 7.4.1.4 Undervoltage Lockout
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Setting
        2. 8.2.2.2 Output Filter Design (Inductor and Output Capacitor)
          1. 8.2.2.2.1 Inductor Selection
          2. 8.2.2.2.2 Output Capacitor Selection
          3. 8.2.2.2.3 Input Capacitor Selection
        3. 8.2.2.3 Low Dropout Voltage Regulators (LDOs)
          1. 8.2.2.3.1 Input Capacitor and Output Capacitor Selection for the LDOs
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 3: –40°C to +85°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Up To 95% Efficiency
  • Output Current for DC-DC Converters:
    • DCDC1 = 1 A; DCDC2 = 0.6 A
  • DC-DC Converters Externally Adjustable
  • VIN Range for DC-DC Converters
    From 2.5 V to 6 V
  • 2.25-MHz Fixed Frequency Operation
  • Power Save Mode at Light-Load Current
  • 180° Out-of-Phase Operation
  • Output Voltage Accuracy in PWM Mode ±1%
  • Total Typical 32-μA Quiescent Current for Both DC-DC Converters
  • 100% Duty Cycle for Lowest Dropout
  • One General-Purpose 400-mA LDO
  • Two General-Purpose 200-mA LDOs
  • VIN Range for LDOs from 1.5 V to 6.5 V
  • Output Voltage for LDO3:
    • VLDO3 = 1.3 V
  • Available in a 4-mm × 4-mm 24-Pin VQFN Package

2 Applications

  • Automotive Li-Ion Battery-Powered Devices
    • GPS, Emergency Cell Phone
    • Digital Cameras
    • Satellite Radio Modules
    • OMAP™ and Low-Power DSP

3 Description

The TPS65053-Q1 device is integrated power management IC (PMIC) for applications powered by one Li-Ion or Li-Polymer cell, which require multiple power rails. The TPS65053-Q1 device provides two highly efficient, 2.25-MHz step-down converters targeted at providing the core voltage and I/O voltage in a processor-based system. Both step-down converters enter a low power mode at light loads for maximum efficiency across the widest possible range of load currents. For low-noise applications, the devices can be forced into fixed-frequency PWM mode by pulling the MODE pin high. Both converters allow the use of small inductors and capacitors to achieve a small solution size.

The TPS65053-Q1 device provides an output current of up to 1 A on the DCDC1 converter and up to 0.6 A on the DCDC2 converter. The device also integrates one 400-mA LDO and two 200-mA LDO voltage regulators, which can be turned on and off using separate enable pins on each LDO. Each LDO operates with an input voltage range from 1.5 V to 6.5 V, allowing them to be supplied from one of the step-down converters or directly from the main battery. LDO1 and LDO2 are externally adjustable, while LDO3 has a fixed output voltage of 1.3 V.

The TPS65053-Q1 device is available in a small 24-pin leadless package (4-mm × 4-mm VQFN) with a 0,5-mm pitch.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65053-Q1 VQFN (24) 4.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Efficiency of DCDC1

TPS65053-Q1 eff1_v_vo_lvs754.gif

4 Revision History

Changes from * Revision (June 2011) to A Revision

  • Added the Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Deleted all references to TPS650531-Q1 and TPS650532-Q1 devices Go
  • Changed values in the Thermal Information table to align with JEDEC standards.Go